Mechanical Dimensions & Land Pattern (PLCC-44(16.6x16.6))
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit PLCC-44(16.6x16.6) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — AT89LS52-16JU (PLCC-44(16.6x16.6))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of AT89LS52-16JU (PLCC-44(16.6x16.6))?
Manufactured by MICROCHIP, the AT89LS52-16JU is housed in a PLCC-44(16.6x16.6) package with 44 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 2.7V to 4.0V. Key pins include: 1 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 2 (P1.0(T2): Multiplexed I/O & Peripheral Pin P1.0(T2) (General)), 3 (P1.1(T2EX): Multiplexed I/O & Peripheral Pin P1.1(T2EX) (General)), 4 (P1.2: Multiplexed I/O & Peripheral Pin P1.2 (General)), 5 (P1.3: Multiplexed I/O & Peripheral Pin P1.3 (General)), 6 (P1.4: Multiplexed I/O & Peripheral Pin P1.4 (General)).
What are the IPC-7351B PCB Footprint dimensions for AT89LS52-16JU?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), AT89LS52-16JU (PLCC-44(16.6x16.6)) has a nominal body envelope of 16.60 × 16.60 mm, pitch e = 1.27 mm, and 44 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for AT89LS52-16JU?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for AT89LS52-16JU (MICROCHIP, PLCC-44(16.6x16.6)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (44 pins) & AT89LS52 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | NC | NC | Signal terminal NC (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General. |
| 2 | P1.0(T2) | Digital_IO | Signal terminal P1.0(T2) (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P1.0(T2). Supported peripheral buses: General. |
| 3 | P1.1(T2EX) | Digital_IO | Signal terminal P1.1(T2EX) (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P1.1(T2EX). Supported peripheral buses: General. |
| 4 | P1.2 | Digital_IO | Signal terminal P1.2 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P1.2. Supported peripheral buses: General. |
| 5 | P1.3 | Digital_IO | Signal terminal P1.3 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P1.3. Supported peripheral buses: General. |
| 6 | P1.4 | Digital_IO | Signal terminal P1.4 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P1.4. Supported peripheral buses: General. |
| 7 | P1.5/MOSI | Digital_IO | Signal terminal P1.5/MOSI (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P1.5/MOSI. Supported peripheral buses: SPI. |
| 8 | P1.6/MISO | Digital_IO | Signal terminal P1.6/MISO (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P1.6/MISO. Supported peripheral buses: SPI. |
| 9 | P1.7/SCK | Digital_IO | Signal terminal P1.7/SCK (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P1.7/SCK. Supported peripheral buses: SPI. |
| 10 | RST | Digital_IO | Signal terminal RST (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: RST. Supported peripheral buses: General. |
| 11 | P3.0/RXD | Digital_IO | Signal terminal P3.0/RXD (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P3.0/RXD. Supported peripheral buses: UART. |
| 12 | NC | NC | Signal terminal NC (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General. |
| 13 | P3.1/TXD | Digital_IO | Signal terminal P3.1/TXD (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P3.1/TXD. Supported peripheral buses: UART. |
| 14 | P3.2/INT0 | Digital_IO | Signal terminal P3.2/INT0 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P3.2/INT0. Supported peripheral buses: General. |
| 15 | P3.3/INT1 | Digital_IO | Signal terminal P3.3/INT1 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P3.3/INT1. Supported peripheral buses: General. |
| 16 | P3.4/T0 | Digital_IO | Signal terminal P3.4/T0 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P3.4/T0. Supported peripheral buses: General. |
| 17 | P3.5/T1 | Digital_IO | Signal terminal P3.5/T1 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P3.5/T1. Supported peripheral buses: General. |
| 18 | P3.6/WR | Digital_IO | Signal terminal P3.6/WR (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P3.6/WR. Supported peripheral buses: General. |
| 19 | P3.7/RD | Digital_IO | Signal terminal P3.7/RD (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P3.7/RD. Supported peripheral buses: General. |
| 20 | XTAL2 | Digital_IO | Signal terminal XTAL2 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: XTAL2. Supported peripheral buses: RTC/CLK. |
| 21 | XTAL1 | Digital_IO | Signal terminal XTAL1 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: XTAL1. Supported peripheral buses: RTC/CLK. |
| 22 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 23 | NC | NC | Signal terminal NC (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General. |
| 24 | P2.0/A8 | Digital_IO | Signal terminal P2.0/A8 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P2.0/A8. Supported peripheral buses: General. |
| 25 | P2.1/A9 | Digital_IO | Signal terminal P2.1/A9 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P2.1/A9. Supported peripheral buses: General. |
| 26 | P2.2/A10 | Digital_IO | Signal terminal P2.2/A10 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P2.2/A10. Supported peripheral buses: General. |
| 27 | P2.3/A11 | Digital_IO | Signal terminal P2.3/A11 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P2.3/A11. Supported peripheral buses: General. |
| 28 | P2.4/A12 | Digital_IO | Signal terminal P2.4/A12 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P2.4/A12. Supported peripheral buses: General. |
| 29 | P2.5/A13 | Digital_IO | Signal terminal P2.5/A13 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P2.5/A13. Supported peripheral buses: General. |
| 30 | P2.6/A14 | Digital_IO | Signal terminal P2.6/A14 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P2.6/A14. Supported peripheral buses: General. |
| 31 | P2.7/A17 | Digital_IO | Signal terminal P2.7/A17 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P2.7/A17. Supported peripheral buses: General. |
| 32 | PSEN# | Digital_IO | Signal terminal PSEN# (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: PSEN#. Supported peripheral buses: General. |
| 33 | ALE/PROG | Digital_IO | Signal terminal ALE/PROG (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: ALE/PROG. Supported peripheral buses: General. |
| 34 | NC | NC | Signal terminal NC (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General. |
| 35 | EA/VPP | Digital_IO | Signal terminal EA/VPP (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: EA/VPP. Supported peripheral buses: General. |
| 36 | P0.7/AD7 | Digital_IO | Signal terminal P0.7/AD7 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P0.7/AD7. Supported peripheral buses: General. |
| 37 | P0.6/AD6 | Digital_IO | Signal terminal P0.6/AD6 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P0.6/AD6. Supported peripheral buses: General. |
| 38 | P0.5/AD5 | Digital_IO | Signal terminal P0.5/AD5 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P0.5/AD5. Supported peripheral buses: General. |
| 39 | P0.4/AD4 | Digital_IO | Signal terminal P0.4/AD4 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P0.4/AD4. Supported peripheral buses: General. |
| 40 | P0.3/AD3 | Digital_IO | Signal terminal P0.3/AD3 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P0.3/AD3. Supported peripheral buses: General. |
| 41 | P0.2/AD2 | Digital_IO | Signal terminal P0.2/AD2 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P0.2/AD2. Supported peripheral buses: General. |
| 42 | P0.1/AD1 | Digital_IO | Signal terminal P0.1/AD1 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P0.1/AD1. Supported peripheral buses: General. |
| 43 | P0.0/AD0 | Digital_IO | Signal terminal P0.0/AD0 (I/O, 2.7V to 4.0V domain). Multiplexed alternate functions: P0.0/AD0. Supported peripheral buses: General. |
| 44 | VCC | Power_In | Primary positive power supply input (VCC) operating in the 2.7V to 4.0V domain (Max rating: 4.0V). |









